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What is try keyword in exception handling in C++?
AnsweredChetan Shidling asked 6 years ago • Cpp Language
815 views1 answers0 votes
What is exception handling?
AnsweredChetan Shidling asked 6 years ago • Cpp Language
771 views1 answers0 votes
What is an exception?
AnsweredChetan Shidling asked 6 years ago • Cpp Language
763 views1 answers0 votes
Draw the Stick-diagram for the Boolean functions?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
727 views0 answers-1 votes
Draw the stick-diagram for the Boolean expression?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
767 views0 answers0 votes
What are the objectives for Euler path and Stick Diagrams?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
1145 views1 answers0 votes
Expression for simple delay model for CMOS gates?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
712 views1 answers0 votes
What are the factors by which time delay of the Gate is affected?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
721 views1 answers0 votes
What is the worst case propagation delay of the circuit?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
1226 views1 answers0 votes
R = 10K, C=0.1pF, then the buffer will experience a delay of Td ?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
690 views1 answers0 votes
What is RC model in CMOS VLSI circuits?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
652 views0 answers0 votes
What is propagation delay in CMOS VLSI circuits?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
678 views1 answers0 votes
What is tpLH and tpHL in CMOS VLSI circuits?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
1558 views1 answers0 votes
What is fall time in CMOS VLSI circuits ?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
704 views1 answers0 votes
What is Rise time in CMOS VLSI circuits?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
1240 views1 answers0 votes
What is Gate delays in VLSI CMOS circuits?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
599 views0 answers0 votes
What are timing parameters in VLSI?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
678 views1 answers0 votes
Explain the characteristics of
OpenChetan Shidling asked 6 years ago • VLSI CMOS
576 views0 answers0 votes
Realize equations for Full adder, and draw the gate level representation and stick diagram using CMOS logic?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
672 views0 answers0 votes
With a neat diagram, explain the various timing parameters of a CMOS circuit?
AnsweredChetan Shidling asked 6 years ago • VLSI CMOS
1383 views1 answers0 votes
State the objectives which are addressed using Euler’s path to draw stick-diagrams?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
565 views0 answers0 votes
Draw the stick-diagram for the following Boolean expression using Euler’s path?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
773 views0 answers0 votes
Draw the stick diagram of 4:1 MUX ?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
1626 views0 answers1 votes
Draw the stick-diagram of 2-input NAND gate and 2:1 MUX ?
OpenChetan Shidling asked 6 years ago • VLSI CMOS
1370 views0 answers0 votes
Which of the following statements is incorrect?
Answeredcs asked 6 years ago • VLSI CMOS
1310 views1 answers0 votes
What happens when we assign same values in two variables, is their address remains same?
Answeredchetan shidling asked 6 years ago • Python
1023 views2 answers0 votes
How to convert values of int and float into complex number in python?
Answeredchetan shidling asked 6 years ago • Python
867 views1 answers0 votes
How to convert float value into int value in python?
Answeredchetan shidling asked 6 years ago • Python
847 views1 answers0 votes
Which of the following is not an objective for using Euler's path to draw stick diagrams?
Answeredcs asked 6 years ago • VLSI CMOS
668 views1 answers0 votes
Which of the following is not true about Latch-up in CMOS circuits?
Answeredcs asked 6 years ago • VLSI CMOS
655 views1 answers0 votes
In clocked CMOS logic, output in evaluated in?
Answeredcs asked 6 years ago • VLSI CMOS
1149 views1 answers0 votes
In the equivalent circuit for PMOS, if the sheet resistance is 20Kohm and width of MOS is 4, then the Drain-Source resistance when the PMOS is ON is numerically equal to?
Answeredcs asked 6 years ago • VLSI CMOS
742 views1 answers0 votes
Pseudo-nMOS has higher pull-up resistance than nMOS device?
Answeredcs asked 6 years ago • VLSI CMOS
704 views1 answers0 votes
Pull Down Network will conduct for all input combinations that requires output Y to be
Answeredcs asked 6 years ago • VLSI CMOS
704 views1 answers0 votes
What is RC Extraction in CMOS VLSI?
Answeredcs asked 6 years ago • VLSI CMOS
944 views1 answers0 votes
What is full form of DRC in CMOS VLSI?
Answeredcs asked 6 years ago • VLSI CMOS
680 views1 answers0 votes
What is Latch-up in CMOS circuits?
Answeredcs asked 6 years ago • VLSI CMOS
722 views1 answers0 votes
What is precharge state in CMOS Dynamic logic?
Opencs asked 6 years ago • VLSI CMOS
644 views0 answers0 votes
What is evaluate state in CMOS Dynamic logic?
Opencs asked 6 years ago • VLSI CMOS
611 views0 answers0 votes
What is Clocked-CMOS logic?
Answeredcs asked 6 years ago • VLSI CMOS
853 views1 answers-1 votes
Difference between dynamic and static logic design?
Answeredcs asked 6 years ago • VLSI CMOS
792 views1 answers0 votes
What is Pseudo NMOS logic in CMOS VLSI?
Answeredcs asked 6 years ago • VLSI CMOS
879 views1 answers0 votes
What are the types of logic circuits in CMOS?
Answeredcs asked 6 years ago • VLSI CMOS
720 views1 answers0 votes
What type of MOS is preferable for PUN?
Opencs asked 6 years ago • VLSI CMOS
634 views0 answers0 votes
What type of MOS is preferable for PDN?
Opencs asked 6 years ago • VLSI CMOS
651 views0 answers0 votes
What is Complementary Logic design?
Answeredcs asked 6 years ago • VLSI CMOS
677 views1 answers0 votes
What is Complementary Logic design?
Opencs asked 6 years ago • VLSI CMOS
689 views0 answers0 votes
What is dynamic logic design?
Answeredcs asked 6 years ago • VLSI CMOS
1191 views1 answers0 votes
What is static logic design?
Answeredcs asked 6 years ago • VLSI CMOS
1202 views1 answers0 votes
What is combinational logic and non-regenerative circuits?
Answeredcs asked 6 years ago • VLSI CMOS
842 views1 answers0 votes
Can i get job after doing course of AWS?
Opencs asked 6 years ago • Cloud Computing
761 views0 answers0 votes
Why Ajax has been made?
Answeredcs asked 6 years ago • Web Development
710 views1 answers0 votes
What languages is AJAX a mixture of?
Answeredcs asked 6 years ago • Web Development
778 views1 answers0 votes
I want to make website, how to make?
Opencs asked 6 years ago • Web Development
703 views0 answers0 votes
What are the various applications of IoT?
Opencs asked 6 years ago • IoT
828 views0 answers0 votes
Consider a scenario such as 'Game Companies'. A game company can be: A. a software developer, like Platinum Games B. a publisher, like for instance Agetec C. a developer AND publisher at the same time, as in Blizzard Entertainment D. all of the above, i.e. Nintendo If you have to model this using C++ programming features, which feature would you select and implement? Also, a company can be multiple of those at the same time.
OpenChetu asked 6 years ago • Cpp Language
668 views0 answers0 votes
what-is-ajax-why-it-is-used-for-web-development
OpenChetan Shidling asked 6 years ago • Web Development
677 views0 answers0 votes
what-is-ajax-why-it-is-used-for-web-development
OpenChetan Shidling asked 6 years ago • Web Development
654 views0 answers0 votes
What is 522 error time out in WordPress?
OpenCs asked 6 years ago • Web Development
710 views0 answers0 votes
What is bootstrap in html & CSS?
AnsweredChetan Shidling asked 6 years ago • HTML
882 views1 answers0 votes
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